1. Field of the Invention
This invention relates generally to electronic circuits and more particularly to the design of ceramic packages which encapsulate integrated circuits.
2. Description of Related Art
Electronic circuits for complex systems such as digital computers typically are comprised of a multiplicity of interconnected integrated circuit chips. The integrated circuit chips are made from a semiconductor material such as silicon or gallium arsenide, and microscopic circuits are formed on the top surface of the chips by photolithographic techniques. In a conventional form of construction, the integrated circuit chips are mounted in respective ceramic packages, and the ceramic packages are mounted on a printed wiring board. The ceramic packages have numerous external pins which are mechanically attached by solder or socket to conductor patterns printed on the printed wiring board.
Each ceramic package has a central cavity receiving an integrated circuit chip, and a set of conductors called leads connecting the external pins to the integrated circuit chip. Typically the leads are provided by a thick film conductor pattern deposited on a ceramic layer of the package. The conductor pattern includes a number of bonding areas spaced around the central cavity of the package. When an integrated circuit is received in the central cavity, the bonding areas align with respective bonding pads formed in metalization layers on the surface of the integrated circuit chip. The bonding areas of the package are connected to the bonding pads on the chip by thin flexible segments of bonding wire or metal tape that are bonded by thermocompression to the bonding areas and pads.
In Very Large Scale Integrated (VLSI) circuits, it is desirable to provide multiple power and ground connections between the external pins and the bonding pads on the integrated circuit. Internal power and ground connections supply power to all of the circuits on the chip with the exception of the input/output stages connected directly to the bonding pads; the input/output stages are supplied with power from external power and ground connections. In order to avoid the need to make a multiplicity of power and ground connections on the printed wiring board, connections are typically provided by separate layers of conductor patterns formed in the package. In either case the arrangement of the conductors from the external pins to the bonding pads affects the inductance and capacitance of the connections, and the isolation between the various connections.
The placement of signal, power, and ground pads on the integrated circuit is to a great extent dictated by the functions performed by the integrated circuit. Therefore, for any given integrated circuit design, there is a preferred arrangement of the conductor patterns between the external pins and the bonding pads. It would be desirable to design electrical components so that certain pins perform the same functions from component to component. However, the complexity inherent in integrated circuit chip design prevents the designer from assigning corresponding chip pads on different chips to perform the same functions.
For newly designed VLSI circuits having multiple power and ground connections, it has been necessary to design multiple layers of conductor patterns interconnecting the external pins to the integrated circuit chip. Associated with this design effort is the necessity of fabricating multiple masks for defining the newly designed conductor layers.